I’m an ASIC digital design engineer at Synopsys in Lisbon, working on production digital controller IPs.

Before that, I spent two and a half years at INESC-ID designing a reconfigurable stream-driven accelerator integrated into a RISC-V SoC. That work became my master’s thesis and a first-author paper at ISCAS 2025. The hardware (BubbleTea) and compiler (StreamFlow) are open source.

I studied Electrical and Computer Engineering at Instituto Superior Técnico, Lisbon.

I like building things and taking other things apart. Currently addicted to Claude 👀